DM54LS174 Datasheet, Clear, National Semiconductor

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DM54LS174 Features and benefits

Y Y Y Y Y Y Y Y LS174 contains six flip-flops with single-rail outputs LS175 contains four flip-flops with double-rail outputs Buffered clock and direct clear inputs In.

DM54LS174 Application

include Buffer storage registers Shift registers Pattern generators Typical clock frequency 40 MHz Typical power dissipa.

DM54LS174 Description

These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic All have a direct clear input and the quad (175) versions feature complementary outputs from each flip-flop Information at the D inputs meeting the set.

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